PU515A 3BSE032401R1 PU517 3BSC980050R46 PU516 3BSE013064R1 PU516A 3BSE032402R1 PU512V2 3BUR001401R1 CI868K01-eA 3BSE048845R2 CI857K01 3BSE018144R1 CI858K01 3BSE018135R1 This includes: mailbox interrupt VMEbus interrupt VMEbus interrupt IACK cycle (confirming VMIVME-7750 VME bus sends an interrupt) All error handling VMEbus related interrupts can be mapped to PCI INTA # or SERR #. Note: PCI SERR # starts SBC NMI. This includes: The ACFAIL interrupt BERR interrupt SYSFAIL interrupt handler has corresponding STATUS/ID registers for each IRQ interrupt. Once the handler receives an IRQ, it requests VMEbus, and once approved, it executes the IACK loop at that level. Once the IACK loop is completed, the STATUS/ID is stored in the corresponding ID register, an appropriate interrupt status bit is set in the internal status register, and a PCI interrupt is generated. PCI interrupts can be mapped to PCI INTA # or SERR# INTERRupTER - Interrupts can occur on any or all software control lines (IRQ7 * to IRQ1 *) of the seven VME bus interrupts. Associate a common ID register with all interrupt lines. During the interrupt confirmation cycle, the interrupt program sends the ID to the interrupt handler. The interrupter can programmatically generate PCI. When the VMEbus interrupt handler is used, the INTA # or SERR # interrupt confirms the VMEbus interrupt generated by the software. Byte swapping - Intel 80x86 series processors use the little endian format. Accommodating other VMEbus modules that transmit data in big endian format as part of the 680x0 processor series,CI854AK01 3BSE030220R1 CI546 3BSE012545R1 CI570 3BSE001440R1 CI522A 3BSE018283R1 CI534V02 3BSE010700R1 CI541V1 CI535V30 3BSE022162R1 CI857K01 3BSE018144R1 CI871AK01 3BSE092693R1 CI873K01 3BSE058899R1 PM861K01 3BSE018105R1 PM511V16 3BSE011181R1 PM861K01 3BSE018105R1 PM783F 3BDH000364R0002 PM864AK01 3BSE018161R1 PM865K01 3BSE031151R1 PM511V16 3BSE011181R1 PM866K01 3BSE050198R1 PM864AK01 3BSE018161R1 PM511V08 3BSE011180R1 PM510V08 3BSE00B373R1PU515A 3BSE032401R1 PU517 3BSC980050R46 PU516 3BSE013064R1 PU516A 3BSE032402R1 PU512V2 3BUR001401R1 CI868K01-eA 3BSE048845R2 CI857K01 3BSE018144R1 CI858K01 3BSE018135R1 CI854AK01 3BSE030220R1 CI546 3BSE012545R1 CI570 3BSE001440R1 CI522A 3BSE018283R1 CI534V02 3BSE010700R1 CI541V1 3BSE014666R1 CI535V30 3BSE022162R1 CI857K01 3BSE018144R1 CI871AK01 3BSE092693R1 CI873K01 3BSE058899R1 PM861K01 3BSE018105R1 PM511V16 3BSE011181R1 PM861K01 3BSE018105R1 PM783F 3BDH000364R0002 PM864AK01 3BSE018161R1 PM865K01 3BSE031151R1 PM511V16 3BSE011181R1 PM866K01 3BSE050198R1 PM864AK01 3BSE018161R1 PM511V08 3BSE011180R1 PM510V08 3BSE00B373R1PU515A 3BSE032401R1 PU517 3BSC980050R46 PU516 3BSE013064R1 PU516A 3BSE032402R1 PU512V2 3BUR001401R1 CI868K01-eA 3BSE048845R2 CI857K01 3BSE018144R1 CI858K01 3BSE018135R1 CI854AK01 3BSE030220R1 CI546 3BSE012545R1 CI570 3BSE001440R1 CI522A 3BSE018283R1 CI534V02 3BSE010700R1 CI541V1 3BSE014666R1 CI535V30 3BSE022162R1 VMIVME-7750 includes byte switching hardware. This provides independent byte exchange interfaces for the master and slave devices. The byte exchange between the main interface and the slave interface is both under software control. VMIVME-7750 supports high throughput DMA Master and transfer slave configurations for medium byte, word, and long word transmissions. If endian conversion is not required, we provide a special "bypass" mode that can be used to further improve throughput. (Not applicable for byte transfer.) Main interface -- MA32: MBLet32: MBLT64 (A32: A24: A16: D32: D16: D8 (EO): BLT32) The VMEbus main interface provides nine independent memory windows to VMEbus resources. Each window is used to map PCI transfers to VMEbus (i.e. PCI base address, window size, VMEbus base address, VMEbus access type, VMEbus address/data size, etc.). The maximum/minimum window sizes for the nine windows are as follows: Slave Interface - Memory Access SAD032: SD32: SBLT32: SBLT64 (A32: A24: A16: D32: D16: D8 (EO): BLT32) VMEbus Slave Interface provides eight independent memory windows for converting to PCI resources. Each window has a separate configuration register for mapping VMEbus transmission to the PCI bus (i.e. VMEbus base address, window size, PCI base address, VMEbus access type, VMEbus address/data size, etc.). The maximum/minimum window size for eight windows is as follows: Use write to post FIFO and/or read to prefetch FIFO to improve system performance. In coupling mode, bypassing FIFOs, VMEbus transactions are directly coupled to the PCI bus (meaning that transfers on VMEbus are not completed until they are completed on the PCI bus).CI857K01 3BSE018144R1 CI871AK01 3BSE092693R1 CI873K01 3BSE058899R1 PM861K01 3BSE018105R1 PM511V16 3BSE011181R1 PM861K01 3BSE018105R1 PM783F 3BDH000364R0002 PM864AK01 3BSE018161R1 PM865K01 3BSE031151R1 PM511V16 3BSE011181R1 PM866K01 3BSE050198R1 PM864AK01 3BSE018161R1 PM511V08 3BSE011180R1 PM510V08 3BSE00B373R1PU515A 3BSE032401R1 PU517 3BSC980050R46 PU516 3BSE013064R1 PU516A 3BSE032402R1 PU512V2 3BUR001401R1 CI868K01-eA 3BSE048845R2 CI857K01 3BSE018144R1 CI858K01 3BSE018135R1 CI854AK01 3BSE030220R1 CI546 3BSE012545R1 CI570 3BSE001440R1 CI522A 3BSE018283R1 CI534V02 3BSE010700R1 Enhanced bus error handling - The enhanced feature of Universal chip bus error handling provides features. Provide latches and registers to allow SBC to read causing bus errors in all modes. The Universal chip supports limited decoupling modes. Provides support for bus cycle timeouts and bus error assertions. The board can be configured to assert bus errors regardless of its status as a system controller. This only asserts bus errors when the Universe chip is the system controller. In addition, this board can be configured to assert interrupts during bus cycle timeouts. The operating system and software SUPERT-VMIVME-7750 provide features beyond embedded PC/AT functionality. These features are supported by VMIC software products aimed at developers who are currently merging VMIC SBC, I/O boards, and workstations into the system. Windows NT/Windows 2000 and VxWorks are the most common supported operating systems through VMIC software products. Windows NT/Windows 2000- IOWorks ? A software family is a set of working software components that together or individually provide anCI541V1 3BSE014666R1 CI535V30 3BSE022162R1 CI857K01 3BSE018144R1 CI871AK01 3BSE092693R1 CI873K01 3BSE058899R1 PM861K01 3BSE018105R1 PM511V16 3BSE011181R1 PM861K01 3BSE018105R1 PM783F 3BDH000364R0002 PM864AK01 3BSE018161R1 PM865K01 3BSE031151R1 PM511V16 3BSE011181R1 PM866K01 3BSE050198R1 PM864AK01 3BSE018161R1 PM511V08 3BSE011180R1 PM510V08 3BSE00B373R1
